IR DROP in High - Speed IC Packages

Today’s low-voltage, high-current designs require DC IR drop analysis for off-chip power distribution systems in order to optimize end-to-end voltage margins for every device on the distribution. This article will introduce the basics of IR drop analysis, exemplify the significance of IR drop associated with IC packages and PCBs, and demonstrate typical IR drop simulations for the identification of problematic power distributions. As system complexity and operational speeds increase, the power consumption of integrated circuits increases dramatically. Additionally, the IC supply voltage continues to drop with the inevitable scaling of VLSI technology. With the switch to 90 nm technologies from 130 nm technology, supply voltages have shrunk to 1.2 V and below. According to the International Technology Roadmap for Semiconductors,1 this trend is expected to continue. See FIGURE 1. Reducing the nominal supply voltage is accompanied by a reduction in device noise margins, making components more vulnerable to power supply noise. This noise consists of the dynamic AC voltage fluctuation due to the frequencydependent distributed parasitics inherent in today’s power distribution systems, and the DC voltage drop (i.e., “IR” drop, according to Ohm’s Law V=I*R, where R is the equivalent path DC resistance between the source location and the device location and I is the average current the chip draws from the supply).